32 bit OTP+Flash
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32 bit Recording
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Audio Amp
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Motor driver
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Touch
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Miscellaneous
VLN3M series SOP 16pins ( built-in flash memory)
body | duration | MIDI | I/O | sampling frequency | ADC | MIC | flash memory |
VLN3M08S16X | ~2min | 16ch | 16 | ~44.1kHz | 12 bit | v | 8Mb |
32-bit MCU with Sub-Band Coding & 16-ch MIDI
The VLN3M series is a 32-bit MCU based high-quality speech/MIDI processor, which is specially designed for customers to innovate with advanced DSP power. It is embedded with OTP (One Time PROM) for mass production, such that no mask is required while MOQ / Lead Time are kept minimized.
There are various useful features inside the VLN3M series: Three sets of 16-bit Timers; 8-ch H/W PWM-IO pins, which provide complimentary outputs (with dead zone generator) and capture feature; 8-channel, 12-bit SAR ADC with MIC pre-amplifier & AGC / PGA that supports differential MIC input; 14-bit DAC + 1.3-watt Push-Pull power amplifier to drive speaker directly; independently configurable GPIO per pin with alternate functions; IR TX that supports 38KHz / 57KHz / 125KHz / 500KHz carrier for Infrared or QFID applications; SPI0 for SPI flash control, powered by embedded optional 3.3V / 1.8V LDO, which supports single/dual/quad I/O mode with XIP (eXecute In Place) capability; SPI1 for 2.4GHz RF module or other SPI devices; SDHC 2.0-compliant memory card; I2C H/W interface and UART TX / RX for serial communication.
Various package forms are available for the VLN3M series: the innovative SOP-16 MCP (Multi-Chip Package), where SPI flash is stacked inside for applications that require small footprints.
Feature
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Wide Operating Voltage: 4V ~ 5.5V
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32-bit CPU core
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Dual Clock Built-in oscillators for HI_CLK (32MHz) and LO_CLK (32.768KHz), accuracy trimmed to +/-0.5% for HI_CLK and +/-1.5% for LO_CLK.
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Power management to support 4 operating modes: Normal / Slow / Standby / Halt At Halt mode, the consumption current is less than 1uA.
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LVD (Low Voltage Detection): Total 6-level options: 6V, 3.4V, 3.2V, 2.6V, 2.4V, 2.2V.
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LVR (Low Voltage Reset): User-configurable, default values are 7V @ 32MHz for VLN3M, 2.4V @ 24MHz, 2.0V @ 16MHz, 1.8V @ 12MHz.
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Timers (Timer0 / Timer1 / Timer2): Each Timer consists of divider and 16-bit down-counter with various clock sources.
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Two PWM Generators (PWMA / PWMB)
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ADC (Analog Digital Conversion)
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8-ch (with auto scan mode), 12-bit resolution SAR (Successive Approximate Register)
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Trigger by underflow of Timer0 /1 /2, or software
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Built-in MIC bias, 2-stage of pre-amplifiers and AGC/PGA for gain
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Built-in 14-bit DAC + 3-Watt Push-Pull power amplifier
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IR , SPI supported.
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RTC with 16KHz (or 4KHz) / 1KHz / 64Hz / 2Hz
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WDT (Watch-Dog Timer) supported with optional 188ms / 750ms
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MCP (Multi-Chip Package)
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Support OTP Security Lock to prevent OTP data from being
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S/W-based Speech/MIDI Codec & various algorithms
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ADPCM Codec (Adaptive Differential PCM): 4-bit / 5-bit per
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SBC Codec (Sub-Band Coding): 5K ~ 32Kbps with maximum bandwidth.
16KHz
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CELP Decoder (Code-Excitation Linear Prediction): 8Kbps @ 8KHz SR for human voice only.
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MIDI: Up to 16-channel MIDI @ 32KHz Output Sample
SOP 16pins assignment
C-Mic recording circuit
SPI protocol with MCU
Clock : PA2 ( Enable low ν 900usec λ€μ clock μμ)
Data : PA3 ( Clock μμΉ μ Dataκ° μ½μ)
Enable: PA4 ( Enable Low λλ©΄ 900usec νμ Clock μμ)
Busy : PA5 ( μ¬μ΄λ μΆλ ₯ λμ Low level )
Code 0 : STOP
Code1~1023 : Sound code
Code 1024~1039 : Volume code (Min. ~ Max.)
VLN3M 3line SPI protocol video
datasheet
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